Graphene is basically the scientific equivalent of Sriracha — no matter what you add it to, it seems to somehow make it better.
The latest way scientists are serving up graphene? As a coating for the wires on electronic chips.
Experiments led by researchers at Stanford University showed that coating chip wires in graphene — a two-dimensional material that consists of a single layer of carbon atoms — allowed the wires to function up to 30 percent faster. Wrapping the wires in graphene could prove particularly useful as engineers continue on in their quest to create ever-smaller chips.
"Researchers have made tremendous advances on all of the other components in chips, but recently there hasn't been much progress on improving the performance of the wires," H.S. Wong, an electrical engineer, said in a release from Stanford.
The current standard material for coating chip wires is tantalum nitride. However, the researchers found that even the thinnest possible layer of tantalum nitride is still eight times as thick as a layer of graphene. The wires found within modern chips are already extremely tiny, but coating them in graphene could help researchers create wires that are as small as possible.
The wires' coating, whether made from graphene or tantalum nitride, serves two key purposes. One is that it protects the silicon transistors on the chip by acting as a barrier around copper within the wire. The other is that — unlike the plastic coating common on household wires, which insulates the copper to prevent fires from breaking out — the coating on chip wires conducts electricity.
Since graphene is excellent at conducting electricity, it helps increase the chip's efficiency while decreasing its overall size. These two advantages are linked — while coating the wires in modern chips with graphene yields modest speed increases of between four and 17 percent, those increases jump as high as 30 percent in smaller chips.
"Graphene has been promised to benefit the electronics industry for a long time, and using it as a copper barrier is perhaps the first realization of this promise," Wong said in a release.
The researchers presented their work at the Symposia of VLSI Technology and Circuits in Kyoto, Japan.
Photo by Matt Laskowski | Flickr
