Intel has announced the return of the L4 cache with its upcoming System on a Chip codenamed Meteor Lake. This is a major development for the company as it is the first time such a technology will be seen on its processors.
Adamantine Cache: Improving Boot Optimization and Security
The memory for the cache will be handled by a technology called Adamantine, which will offer users much faster access than any typical cache like Level 3. Intel's patent from December 2020 revealed that 'next-generation SoC architecture' is set to feature 'on-package caches.'
According to the story by Video Cardz, the Adamantine cache will be accessible by all the components of the SoC. The primary use of such a technology is to improve boot optimization and the general security of the host CPU.
Improvements to Level 4 Cache of Intel's Meteor Lake System on a Chip
It also decreases the time it takes to load the cache due to resetting. Embodiments have been set up to use the value of high-end silicon, where more memory is available at reset. This can be used in applications like Automotive IVI, robots, etc.
Intel's upcoming System on a Chip, codenamed Meteor Lake, is already causing a lot of excitement in the tech industry. It is expected to be a major step up from the Broadwell processors and features the return of a Level 4 cache, which Phoronix first reported in the recent Linux patches.
Intel's Patent Reveals Further Details on Upcoming Meteor Lake Architecture
However, it is not yet clear what its implementation will look like. Luckily, Intel has already filed a patent with additional details about what fans can expect from its next-gen SoC architecture.
According to the patent, Meteor Lake will feature 'on-package caches,' more commonly known as the Adamantine cache. This cache is expected to offer much faster access time than the typical L3 cache in CPUs, leading to faster boot optimization and improved security around the host CPU.
Having the cache available at reset will also help to nullify legacy BIOS assumptions and help to make faster, more efficient BIOS solutions. Another interesting point is the Block diagram, which confirms that Meteor Lake will have 8 CMT cores under its SOC tile.
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L4 Cache and Adamantine Cache Expectations
This is also in line with recent leaks, which suggested the same. Furthermore, the diagram also shows that the SoC will feature Gen 12.7 Xe graphics with 64 EUs. Finally, Moore's Law is Dead recently stated in his video that the Adamantine cache would range from 128 to 512MB and could even go up to gigabytes, as explained further in a video by Moore's Law Is Dead on YouTube.
In any case, Intel Meteor Lake is expected to launch in the second half of 2023, with exact details expected to become available in the coming months. It should be an exciting launch, and it will be interesting to see how well the return of the L4 cache helps to improve the performance of the next-gen SoCs.
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